Senior Design Engineer-CPU
Next Silicon
Senior Design Engineer-CPU
- Hardware
- Israel
Description
NextSilicon is a swiftly growing unicorn startup that is reimagining high-performance computing. Our pioneering coprocessor vastly accelerates supercomputers, driving them forward into a new generation. Our new software-defined hardware architecture enables HPC and AI to fulfill its promise of breakthroughs in all advanced research fields.
We are looking for an experienced, talented ASIC front-end design expert to join our CPU group . In this high-visibility and influential role, you will take part in developing and integrating cutting-edge technologies from definition stage through planning stage and the development of new features while solving challenging implementation problems and ending in successful tape-out and product bring-up .
At NextSilicon, everything we do is guided by three core values:
- Professionalism: We strive for exceptional results through professionalism and unwavering dedication to quality and performance.
- Unity: Collaboration is key to success. That's why we foster a work environment where every employee can feel valued and heard.
- Impact: We're passionate about developing technologies that make a meaningful impact on industries, communities, and individuals worldwide.
Requirements
- 6+ years of experience in complex ASIC designs
- VLSI expert with a deep understanding of chip architecture and design flows
- Experience in design for timing and power
- Experience working with various front-end tools and flows (CDC, LINT, Synthesis, DFT, UPF and power optimization and analysis )
- Good understanding of reset and clock design (including CTS)
- Excellent leadership and interpersonal skills, able to drive colleagues to achieve the project goals
- Good understanding of hardware-software partitions and tradeoffs
- Knowledge of process nodes synthesis and place and route flows
- Experience in CPU design - advantage
Responsibilities
- Define and drive the design of advanced blocks from micro-architecture phase to netlist
- Support timing and constraints definitions work closely with the BE team on timing and physicals implementation efforts
- Leading processes relating to power optimization
- Technology expert, building a knowledge base for the group
- Work with various teams to drive execution (SW, Architecture, verification, BE, etc)
- Devise execution indicators and monitor and report execution progress to enable prioritization and clear decision making